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Model and tool plugins
Digital Circuit plugin
Synthesis and verification support for mutex with the following protocols (configurable via Digital Circuit→Mutex protocol in global preferences):
Strict – forbid two grants to go high (this is default option)
Relaxed – allow two grants to be high, but only on reset phase
Improvements in Connection tool
Intelligent positioning of automatically created pins
Automatic creation of pins when connecting directly to/from a components
Improvements in Initialisation analyser tool
Support for don't touch zero delay components
New functionality in Cycle analyser tool
Interactive and automatic modes of loop breaking with highlighting the gates within and outside of loops
Automatic insertion of testable loop breaking buffers that can be connected to scan
Scripting interface to loop breaking commands
Additional use of loop breaking tool for explicit disabling of timing arcs (can be exported as set_disabled_timing SDC constraints)
Improved export to Verilog
Reset logic as assign statement for unmapped circuits
Explicit declaration of wires
Possibility to delay assign statements (configurable via Digital Circuit→Delay assign statements in Verilog export in global preferences)
Direct/invert substitution rules (configurable via Digital Circuit→Invert substitution rules in global preferences)
Unified commands for tagging Force init and Path breaker properties
Common color scheme for Initialisation analyser and Cycle analyser tools (configurable via Decoration→Analysis in global preferences)
JavaScript functions to set/get circuit environment (setCircuitEnvironment(work, env)/setCircuitEnvironment(work))
Signal Transition Graph plugin
Verification of STG for output determinacy, i.e. that the STG is not self-contradictory.
Improved report for violation of N-way conformation, the user can choose from the following report styles (configurable via MPSat verification→Report style for conformation violation in global preferences):
Brief – enumerates violation traces and their projections on communicating components
Table – represents the projections in a tabular form, one column per communicating component
List – for each even in the violation trace lists its producer and receiver components
Waveform Transition Graph plugin
Simulation of unstable signals
Revised soundness checks
Tutorial on design of instruction decoder using guards
Fixes and technical stuff
Fix handling of zero delay buffers and inverters
Unified codebase for handling modal dialogs and their buttons
Refactor class names to exclude plugin prefix
Version ordered application of compatibility patches
Common table models for color legend and item list
Implementation of Johnson and Kosaraju graph algorithms
Source code compatibility and integration tests for Java 11. Note that Java 8 compatibility is still our main focus.