21-22 May 2018 at Dialog Semiconductor, Swindon, UK

This tutorial will cover both the fundamental principles of asynchronous system design and the advanced techniques for technology mapping, and verification and synthesis of hierarchical designs. Workcraft toolkit will be used for the practical sessions.

• Lectures (4 hours)
  • Asynchronous design principles
  • Models, techniques and tools
  • Logic synthesis from STGs
  • Implementation styles
  • Resolution of CSC conflicts

• Practicals (3 hours)
  • Introduction to Workcraft
  • Design of C-element
  • Design of basic buck controller
  • Design of VME bus controller (optional)

• Lectures (2 hours)
  • Logic decomposition and technology mapping
  • N-way conformation

• Practicals (4 hours)
  • Logic decomposition and technology mapping
  • Verification and synthesis of hierarchical designs

• basic-lecture_1-introduction_to_principles_and_models.pdf (1 MiB)
• basic-lecture_2-logic_synthesis_and_implementation_styles.pdf (665 KiB)
• basic-practical_0-workcraft_overview.pdf (515 KiB)
• basic-practical_1-c_element.pdf (557 KiB)
• basic-practical_2-buck_controller.pdf (765 KiB)
• advanced-lecture_1-logic_decomposition_and_technology_mapping.pdf (785 KiB)
• advanced-lecture_2-n_way_conformation.pdf (62 KiB)
• advanced-practical_1-logic_decomposition_and_technology_mapping.pdf (521 KiB)
• advanced-practical_2-verification_and_synthesis_of_hierarchical_designs.pdf (452 KiB)